| Description |
Found in |
Status |
| Bits 3 and 5 of flags register are not emulated |
1.0 |
Open |
| In interrupt mode 2, the only multi-byte opcodes supported are
CALL and JP |
1.0 |
Open |
| LD B,RLC (IX+r) etc. opcodes are not supported |
1.0 |
Open |
| LD IXh,IXl etc. opcodes aren't emulated correctly |
1.1 |
Fixed in 1.2 |
| LDIR and LDDR crash when DE reaches PC |
1.1 |
Fixed in 1.2 |
| Bits 8-15 of I/O port addresses are not decoded |
1.0 |
Fixed in 1.2 |
| DEC doesn't set N flag when compiled without X86_ASM #defined |
1.0 |
Fixed in 1.1 |
| RETN doesn't reset IFF1 |
1.0 |
Fixed in 1.1 |
| BIT 7,X doesn't set sign flag |
1.0 |
Fixed in 1.1 |
| Disassembler doesn't handle DD and FD correctly |
1.0 |
Fixed in 1.1 |